| Number of Pins | 14 |
|---|---|
| Packaging | Tube |
| Output Current | 5.20 mA |
| Polarity | Inverting, Non-Inverting |
| REACH SVHC Compliance | No SVHC |
| Supply Voltage (DC) | 6.00 V (max), 2.00 V (min) |
| RoHS | Compliant |
| Operating Temperature | 125 °C (max) |
| Number of Gates | 2 |
| Frequency | 76.0 MHz |
| Case/Package | DIP |
| Lead-Free Status | Lead Free |
| Mounting Style | Through Hole |
| Number of Circuits | 2 |
| Number of Bits | 1 |
Logic
| Manufacturer | NXP Semiconductors |
|---|---|
| Manufacturer Part Number | 74HC74N |
| Description | DUAL D FLIP-FLOP PRS. DIP |
| Stock Code | W002902 |
| Download |  Technical Datasheet |
The 74HC74N is a dual D-type positive-edge-triggered Flip-flop with clear and preset. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D-input can be changed without affecting the levels at the outputs.
- Wide operating voltage range
- Outputs can drive up to 10 LSTTL loads
- Low power consumption
- 15ns Typical TPD
- ±4mA Output drive at 5V
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