| REACH SVHC Compliance | No SVHC |
|---|---|
| Mounting Style | Through Hole |
| Number of Bits | 2 |
| Number of Circuits | 2 |
| Lead-Free Status | Lead Free |
| Operating Temperature | -40.0 °C to 85.0 °C |
| Case/Package | PDIP |
| Frequency | 60.0 MHz |
| Output Current | 5.20 mA |
| Number of Pins | 14 |
| Propagation Delay Max (tpd) | 37.0 ns |
| RoHS | Compliant |
| Supply Voltage (DC) | 2.00 V to 6.00 V |
| Polarity | Inverting, Non-Inverting |
| Output Current Drive | -1.00 mA |
| Voltage Nodes | 2.00 V, 5.00 V, 6.00 V |
| Packaging | Tube |
| Lifecycle Status | Active |
Logic
| Manufacturer | Texas Instruments |
|---|---|
| Manufacturer Part Number | 74HC74N |
| Description | LOGIC, D-Type Flip-Flop, Dual, DIP14 |
| Stock Code | W006370 |
| Download |  Technical Datasheet |
The CD74HC74E is a high speed CMOS logic dual positive-edge-triggered D-type Flip-flop with set and reset. The HC74 utilizes silicon gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. It exhibits the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads. This flip-flop has independent DATA, SET\, RESET\ and CLOCK inputs and Q and Q\ outputs. The logic level present at the data input is transferred to the output during the positive-going transition of the clock pulse. SET\ and RESET\ are independent of the clock and are accomplished by a low level at the appropriate input.
- Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times
- Asynchronous reset
- Complementary outputs
- Buffered inputs
- Balanced propagation delay and transition times
- Significant power reduction compared to LSTTL logic ICs
- ±20mA DC input/output diode current
- ±25mA DC drain current
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