Propagation Delay Max (tpd) | 4.40 ns |
---|---|
Packaging | Cut Tape (CT), Tape & Reel (TR) |
Output Current | 32.0 mA, 50.0 mA |
REACH SVHC Compliance | No SVHC |
RoHS | Compliant |
Number of Pins | 8 |
Supply Voltage (DC) | 5.50 V (max), 1.65 V (min) |
Operating Temperature | -40.0 °C (min) |
Number of Gates | 2 |
Frequency | 200 MHz |
Case/Package | SSOP |
Lifecycle Status | Active |
Number of Bits | 1 |
Mounting Style | Surface Mount |
Lead-Free Status | Lead Free |
Manufacturer | Texas Instruments |
---|---|
Manufacturer Part Number | SN74LVC1G74DCTR |
Description | Single Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset 8-SM8 -40 to 125 |
Stock Code | W008690 |
Download | ![]() |
The SN74LVC1G74DCTR is a single positive-edge-triggered D-type Flip-flop is designed for 1.65 to 5.5V VCC operation. A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
- Supports down translation to VCC
- ±24mA Output drive at 3.3V
- Ioff Supports live insertion, partial-power-down mode and back-drive protection
- Latch-up performance exceeds 100mA per JESD 78, class II
- Green product and no Sb/Br
Related products
-
Logic
Texas Instruments TXB0104PWR
0 out of 5(0)The TXB0104PWR is a 4-bit non-inverting translator IC uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 to 3.6V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 to 5.5V. This allows for universal low-voltage bidirectional translation between any of the 1.2, 1.5, 1.8, 2.5, 3.3V and 5V voltage nodes. VCCA should not exceed VCCB. When the output-enable (OE) input is low, all outputs are placed in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pull-down resistor, the minimum value of the resistor is determined by the current-sourcing capability of the driver. It is designed so that the OE input circuit is supplied by VCCA.
- 1.2 to 3.6V on A Port and 1.65 to 5.5V on B Port (VCCA<=VCCB)
- VCC Isolation Feature – If Either VCC Input Is at GND, All Outputs are in High-Impedance State
- OE Input Circuit Referenced to VCCA
- Low-power Consumption, 5µA Maximum ICC
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-up Performance Exceeds 100mA Per JESD 78, Class II
- Green Product, No Sb/Br
SKU: W017007 -
Logic
Texas Instruments SN74LVC1G332DBVR
0 out of 5(0)The SN74LVC1G332DBVR is a single 3-input positive-OR Gate. The device performs the Boolean function in Y = A + B + C or (A\ • B\ • C\)\ positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
- ±24mA Output drive at 3.3V
- 10µA Maximum ICC low power consumption
- Inputs accept voltages to 5.5V
- Maximum tpd of 4.5ns at 3.3V
- Ioff supports live insertion, partial power down mode and back drive protection
- Supports down translation to VCC
- ESD protection exceeds JESD 22
- Latch-up performance exceeds 100mA per JESD 78, Class II
- Green product and no Sb/Br
SKU: W006358 -
Logic
Texas Instruments SN74LVC1G04DBVR
0 out of 5(0)The SN74LVC1G04DBVR is a single inverter gate IC, designed for 1.65 to 5.5V VCC operation. The device performs the Boolean function Y = A. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.
- Supports 5V VCC Operation
- Input Accepts Voltage up to 5.5V Allowing Down Translation to VCC
- 3.3ns at 3.3V Maximum Propagation Delay Time
- Low-power Consumption, 10µA Maximum ICC
- ±24mA Output Drive at 3.3V
- Ioff Supports Live-insertion, Partial-power-down Mode and Back-drive Protection
- Latch-up Performance Exceeds 100mA Per JESD 78, Class II
- Green Product, No Sb/Br
SKU: W006356 -
Logic
Texas Instruments SN74HC112N
0 out of 5(0)The SN74HC112N is a dual negative-edge-triggered J-K Flip-flop with clear and preset. A low level at the preset (PRE\) or clear (CLR\) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the J and K inputs meeting the setup time requirements are transferred to the outputs on the negative-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the fall time of the CLK pulse. Following the hold-time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. This versatile flip-flop performs as toggle flip-flop by tying J and K high.
- Outputs can drive up to 10 LSTTL loads
- 13ns Typical tpd
- ±4mA Output drive at 5V
- 1µA Maximum low input current
- 40µA Maximum low power consumption
SKU: W007161