The MK60FN1M0VLQ15 is a 32-bit Kinetis K6x Microcontroller with Ethernet crypto, based on ARM Cortex-M4 RISC architecture core operates at a maximum frequency of 150MHz. The device incorporates 1024kB internal flash, 128kB internal RAM, four 16-bit SAR A/D converter, two 12-bit D/A converter and 100 general-purpose I/O pins. This device also features communication interfaces like six UART modules, three SPI modules, two I2C modules and two I2S modules.

• ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz
• Serial programming interface (EzPort)
• FlexBus external bus interface
• NAND Flash controller interface
• 3 to 32MHz and 32kHz Crystal oscillator
• Multi-purpose clock generator
• Multiple low-power modes to provide power optimization based on application requirements
• Memory protection unit with multi-master protection
• 32-channel DMA controller, supporting up to 128 request sources
• External watchdog monitor and software watchdog
• Low-leakage wakeup unit
• Hardware CRC module to support fast cyclic redundancy checks
• Hardware random-number generator
• Hardware encryption supporting DES, 3DES, AES, MD5, SHA-1 and SHA-256 algorithms
• 128-bit Unique identification (ID) number per chip
• Low-power hardware touch sensor interface (TSI)
• Programmable gain amplifier (PGA) (up to x64) integrated into each ADC
• Four analog comparators (CMP) containing a 6-bit DAC and programmable reference input
• Programmable delay block
• Two 8-channel Motor control/general purpose/PWM timers

Combining Advanced Silicon Modular Block (ASMBL™) architecture with a wide variety of flexible features, the Virtex®-4 family from Xilinx greatly enhances programmable logic design capabilities, making it a powerful alternative to ASIC technology. Virtex-4 FPGAs comprise three platform families LX, FX, and SX offering multiple feature choices and combinations to address all complex applications. The wide array of Virtex-4 FPGA hard-IP core blocks includes the PowerPC® processors (with a new APU interface), tri-mode Ethernet MACs, 622 Mb/s to 6.5 Gb/s serial transceivers, dedicated DSP slices, high-speed clock management circuitry, and source-synchronous interface blocks. The basic Virtex-4 FPGA building blocks are enhancements of those found in the popular Virtex, Virtex-E, Virtex-II, Virtex-II Pro, and Virtex-II Pro X product families, so previous-generation designs are upward compatible. Virtex-4 devices are produced on a state-of-the-art 90 nm copper process using 300 mm (12-inch) wafer technology.

• Virtex-4 LX: High-performance logic applications solution
• Virtex-4 SX: High-performance solution for digital signal processing (DSP) applications
• Virtex-4 FX: High-performance, full-featured solution for embedded platform applications
• Xesium™ Clock Technology
• Digital clock manager (DCM) blocks
• Additional phase-matched clock dividers (PMCD)
• Differential global clocks
• XtremeDSP™ Slice
• 18 x 18, two’s complement, signed Multiplier
• Optional pipeline stages
• Built-in Accumulator (48-bit) and Adder/Subtracter
• Smart RAM Memory Hierarchy
• Distributed RAM
• Dual-port 18-Kbit RAM blocks
• Optional pipeline stages
• Optional programmable FIFO logic automatically remaps RAM signals as FIFO signals
• High-speed memory interface supports DDR and DDR-2 SDRAM, QDR-II, and RLDRAM-II.